Ali Niknejad


This document contains a list of the most Frequency Asked Questions (FAQ) about ASITIC (and their answers). This is not documentation for ASITIC. There is a separate file ASITIC documentation.

0. What is ASITIC?

ASITIC stands for Analysis and Simulation of Inductors and Transformers in Integrated Circuits. Use ASITIC to design, analyze, and model the electrical and magnetic behavior of passive metal structures sitting on top of a lossy conductive substrate.

Most users of ASITIC are designing inductors and transformers for Si RF microwave circuits. But ASITIC is not limited to this application alone. You can analyze substrate coupling, interconnect parasitics, and lossy transmission lines with ASITIC as well. For more information:

1. Why is "pi" model so simple? Is ASITIC really modeling the structure correctly?

The "pi" parameters do not really model the spiral but in fact represent the 2-port parameters of the structure at a particular frequency. The "pi" parameters are simply a one-to-one translation of the 2-port parameters into a circuit representation. If you like, this is a narrow-band or single frequency model of the structure. You will notice that the "pi" parameters vary as a function of frequency. You can construct a frequency-independent model the spiral by optimization, or by fitting the model parameters to the 2-port parameters of the structure. Use the "2-port" command to calculate the 2-port parameters of a structure over a frequency range. See question 6 for more details.

2. Why does R go negative (both Rsub and Rseries) at higher frequencies? Is this even physical?

In answer to the second question, yes, it is physical. If you examine the real part of the input impedance of the 2-port network (with open or short on the other port) you will always discover a positive real part. Remember the "pi" network is just a translation of the 2-port parameters into a particular circuit representation. If this circuit representation is "not valid" then the numbers will look funny. For instance, when the device self-resonates, the inductance will to negative. To understand why Rseries goes negative is a bit more complicated but it can be understood by considering a Y to delta transformation of a two port network linked by lossy capacitors.

3. Does ASITIC model skin effect?

Yes, ASITIC models skin effect with the "piX" commands (X=2,3...) or through the 2-port commands by sub-dividing segments in width/thickness/length and generating the partial inductance matrix. The order of the matrix is reduced to produce a frequency dependent complex "inductance" matrix. The real part of this matrix increases as a function of frequency as it models skin and proximity effects. (See my thesis for more details, PDF or postscript.)

For the simple "pi" command, the resistance is calculated at DC and then a closed-form expression is used to estimate the skin effect in the conductor at high frequency. This neglects proximity effects, though.

4. What is the substrate tap or substrate contact? Do I have to use it?

The substrate tap is a metal conductor that grounds the surface of the substrate. Most integrated circuits use substrate taps to collect the substrate current injected by passive and active devices. You are not required to use a substrate tap but if your substrate conductivity is not too high, lateral currents will flow into the tap and the substrate loss will depend on the location of the substrate tap. You can model this effect by creating a substrate contact metal layer in the technology file and using the "pi3" or "2portgnd" commands to correctly extract the substrate effects.

5. Why does the transformer model have a "ground" resistance?

Similar to the "pi" parameters, the transformer model is a 2-port circuit representation of the 2-port parameters of the transformer, as shown in the figure below.

To make the circuit representation unique, a ground resistance is used. This ground resistance, though, can also show up in measurement results since many times the primary and secondary ground share a common path to the actual ground used in the measurements.

6. How do I find a broadband model for the spiral?

Use the "2port" family of commands to calculate the 2-port parameters (s or y or whatever). Then select a circuit representation of the 2-port network such as the following.

Next, create a SPICE deck representing the 2-port and use your favorite flavor of SPICE to fit the circuit parameters to the calculated s-parameters. This can also be used to model the measured 2-port parameters. Here is an example in HSPICE.

7. I am having problems running the Solaris or HP-UX version. On Solaris, here is the error message I get: asitic.SunOS.5.6: fatal: can't open file: errno=2

Fisrt, make sure you have a LD_LIBRARY_PATH environmental variable defined and set to the correct directory. If you still have this problem, it's because ASITIC is linked dynamically, and wants to find the lib$$VER libraries instead of the lib$$VER library. You can resolve this problem by creating a link such as:

	ln -s $ $ 

Another option is to update your libraries. For HP-UX, the same comments apply except the environmental varialbe is SHLIB_PATH

8. Do I need to run GENDATA to run ASITIC?

Version 5.2.99 and up Gendata is now built-in and not a separate program. Running pi2, for instance, will generate the data files if they do not already exist. If you do not want to generate a physical file, use the "TechIO" command to turn off the writing to disk option.

Versions prior to 5.2.99

No. ASITIC works without GENDATA but only the fast/simple "pi" family of commands work. These commands do not simulate the 3-D substrate coupling that occurs between segments of a structure, or between two separate structures.

9. Does ASITIC simulate CMOS eddy currents?

Version 10.20.99 and up

ASITIC now models eddy currents for "Manhatten" geometries using a fast 2D approximation. This has been tested against measurement for square single and multi-layer structures.

Versions prior to 10.20.99

No. ASITIC calculates the magnetostatic partial inductance matrix in free space neglecting the substrate completely. Thus, no magnetically induced currents are assumed to exist in the substrate. For highly conductive substrates (less than 1 ohm-cm) , which can be found in CMOS processes, eddy currents do exist and severely limit the Q at higher frequencies. To address this problem, the next version of ASITIC will calculate the eddy-current induced losses.

10. Can I simulate VIAS with ASITIC?

Yes, vias can be the limiting factor for many designs utilizing baluns or symmetric inductor and inclusion of losses due to the vias are important. This will sometimes influence the number of turns in an optimization of a symmetric structure since new turns involved level interchanges which accrue resistance.

11. Are Baluns supported?

Yes, to create a balun use the balun command.

12. Is there is Windows 95/NT version working?

Yes, but it is in development. I hope to release this version in the near future. But I wholeheartedly recommend using the Linux version.

13. Why does L changes as a function of frequency?

Physically L (inductance) should decrease as a function of frequency since at higher frequencies internal inductance decreases as the magnetic field is prevented from penetrating the volume of conductors reducing the inductance to its asymptotic external limit. But when you observe the "pi" parameters, you will notice that inductance increases near the self-resonant frequency before changing sign as you cross the self-resonant frequency.

This effect is caused by the capacitance in shunt with the inductor. This capacitor has two components, a high-Q coupling capacitance through the air/oxide and a low-Q substrate capacitance. This capacitance eventually resonates the inductance and thus beyond self resonance the "inductance" becomes negative, or simply capacitive. Before self-resonance, though, the reactance of the structure peaks and close to self-resonance the imaginary part of the reactance divided by frequency (the "inductance") is larger than the value obtained far below self-resonance and this reactance increases faster than a linear function. This is why the inductance shows a boost close to self-resonance.

On the other hand, if the self-resonance occurs through a low Q capacitor, such as the substrate, then you will not observe this peaky behavior and you will simply notice a decrease in inductance. If significant eddy currents flow, then the inductance will also decrease as substrate currents in the substrate produce a magnetic field that tends to cancel the impressed magnetic field.

14. What are the units of sheet resistance in the technology file?

The units are in milliOhms/sq. For a typical process this number is between 10 and 100.

15. Can I connect spirals in series or parallel?

Yes, use the JOIN command. JOIN X Y SHUNT (JoinShunt X Y Z ... in version 5.2.99 and up) connects them in shunt and JOIN X Y connects structures X and Y in series. Note that X and Y are arbitrary structures and through repeated calls to JOIN you can create many parallel/series structures. For SHUNT joining, the first n segments are joined in shunt where n is the minimum number of segments between X and Y. See question 22 for an example of joining in series. Also, you can use the SPLIT command to 'unjoin' a spiral.

16. What is the purpose of PHASE and ORIGIN?

The PHASE of a structure represents the direction of current flow from segment to segment. (The "ShowPhase" command shows the direction of current flow in Version 10.20.99 and up.) This can be significant when more than one structure is present and one wishes to examine the magnetic coupling from one structure to the other. For instance, in a transformer this phase plays an important role. Furthermore, when joining spirals in series make sure that the structures have the correct PHASE. For instance, if M > 0 for two spirals and you join them in series, you expect the inductance to increase to L1+L2+2*M. But if the phase is wrong, you will get L1+L2-2*M. See qustion 22 for an example.

The ORIGIN command is used to place structures in non-overlapping regions of the chip. But even with only one spiral is present, the ORIGIN can be important. Do not abut structures to the chip boundaries as the boundary conditions at the chip boundaries do not allow fields to penetrate the 'walls' of the boundary. Always use a chip-size larger than the largest physical dimension of your structure to avoid this.

17. What are the units of the "pi" commands?

Unless otherwise stated:

18. How do I export my design into a layout tool? Do I generate a CIF file?

Yes, use the CIFSAVE command to save the currently loaded structures into a CIF file. In an older version of ASITIC you may need to specify the scale and grid size. Use

1/(grid size)=100
for best results.

If you are using a new release of ASITIC, the CIFSAVE command takes arguments. Type `help CIFSAVE' for more information. Also, see the Importing CIF Files into Cadence application notes.

19. Which version of ASITIC is best?

Without a doubt, the Linux version running on a Pentium II+ based system is the best. The reason for this stems from the fact that Intel has released their BLAS 3 level code which allows the LAPACK routines, used heavily in matrix inversions, to perform optimally. LAPACK code utilizes the cache to maximize throughput from memory into the CPU in order to run the FPU at maximum capacity. LAPACK cannot do this without some awareness of the underlying hardware. This awareness is provided by the BLAS level 3 code. While the Sun and HP versions of the code utilize the generic netlib FORTRAN implementation of BLAS, this code is non-optimal.

If you possess BLAS code for your platform, please inform me and I can send you an optimized version of ASITIC. At UC-Berkeley we have access to the Sun High Peformance Library so I am able to dynamically link ASITIC with this code. But this code is only available at run time and you must have this library on your machine as well. Let me know if you are interested in obtaining an optimized version of ASITIC. For instance if you have access to MLIB for HP-UX or if you are running on a DEC alpha platform you will be able to get access to BLAS.

The difference in speed is dramatic. I run ASITIC on a P-II 400MHz platform and matrix inversions on the order 1000x1000 are performed in seconds as compared to several minutes on other platforms.

20. Where can I learn more about how ASITIC actually does the calculations?

Read my Master's Thesis on-line. PDF and postscript files are available. If you are having trouble downloading the thesis, let me know. I will email you a compressed version.

21. Why do the "pi" commands generate multiple Q values?

Q1 represents the Q of the 2-port if you were to ground the inner port of the spiral. Similarly, Q2 represents the Q looking in from the inner port and grounding the outer port. Usually Q1 > Q2 since Q2 has extra substrate losses associated with the bottom metal layer. For symmetric inductors Q1 ~ Q2. Q3 or Qd represents the differential Q if you were to drive the structure differentially. Qd > max(Q1,Q2) since the substrate injection is minimized. Note that the concept of the outer and inner port of the spiral depends on the PHASE of the spiral.

22. How to create series spirals with join command?

You can create a 'helical spiral' on several metal layers using the SQMM (square multi-metal) command. Here is an example of how to join spirals by hand.

To connect two spirals on metal layers 1 and 2 in series, follow the following steps. First, create the structure on one metal layer and DO NOT use an exit metal layer. Then copy the top spiral into a new metal layer (CP X Y Mz). Now flip and rotate the bottom structure and flip the phase and then join:

# first create a square spiral inductor

SQ NAME=A:LEN=2e+02:WID=2e+02:W=10:S=5:N=5.00:METAL=2:EXIT=-1:XORG=2e+02:YORG=2e+02:ORIENT=0.00:PHASE=1 

# now make a copy on metal layer M2
CP A B M2 

# move B so we can see what is going on
MV B 200 0 

# rotate and flip B
ROT B 90 

# move B back to its original location
MV B -200 0 

# flip the phase of B so the inner port is port 1

# check inductance and coupling between A and B
K A B 

# now join A and B

# check to see if L = L1 + L2 + 2*M

23. What platforms do you currently support?

Linux 2.2.5 ELF binary, SunOS and Solaris (2.5, 2.6), HP-UX 9 and 10, Windows 95/NT (coming soon). All code compiled with gcc libraries and X11R6 X libraries.

If there is another platform you wish to use, please inform me and we will make arrangments to port the code. Generally ASITIC ports easily to UNIX systems running X.